This invention relates to a method of generating unique addresses for each of a plurality of circuit units coupled to a single path at individual spaced coupling points along its length, the method comprising the step of transmitting an address generation signal along said path.
The invention further relates to a circuit arrangement or network for generating a unique address for each of a plurality of circuit units, said circuit arrangement comprising a plurality of circuit units coupled to a single path at individual spaced coupling points along its length, and a control circuit for transmitting an address generation signal along the path from one end thereof, from which address generation signal each circuit unit derives a unique address, wherein each circuit unit includes an address generator.
The invention further relates to a circuit unit suitable for use in a circuit arrangement as set forth in the preceding paragraph, said circuit unit comprising an input for connection to said coupling point and an address generator coupled to said input, the state of the address generator being modified in response to address generation signals applied to said input.
U.K. Patent Specifications No. 1295332 discloses a method, an electrical circuit arrangement and an electrical circuit unit as set forth in the preceding paragraphs. The description with reference to FIGS. 6 and 7 of that specification shows a circuit arrangement comprising a plurality of terminals coupled to a transmission line at individual spaced coupling points approximately 10 meters apart. Each terminal includes an address generator which is incremented by a clock signal applied thereto via a gate which is opened and closed by a start and a stop signal transmitted along the transmission line. Each terminal is provided with a high frequency (10 MHz) clock signal generator. By using the signal propagation delay along the transmission line and ensuring a minimum spacing between terminals, a difference in the time of opening of the gate in each terminal can be achieved such that the difference is greater than the period of the clock signal. Hence each address generator will provide a different address. This circuit arrangement may be satisfactory where a large spacing between terminals is possible, though it may also impose stringent requirements on the clock signal generators, but is impracticable when the terminals are separated by small distances since the required clock frequency would be correspondingly increased.